Parallel Circuit Simulation
Transistor-level circuit simulation is a fundamental computer-aided design technique that enables the design and verification of an extremely broad range of integrated circuits. With the proliferation of modern parallel processor architectures, leveraging parallel computing becomes a necessity and also an important avenue for facilitating large-scale circuit simulation. This article presents an in-depth discussion on parallel transistor-level circuit simulation algorithms and their implementation strategies on a variety of hardware platforms. While providing a rather complete perspective on historical and recent research developments, this paper highlights key challenges and opportunities in developing efficient parallel simulation paradigms.
| Title | : | Parallel Circuit Simulation |
| Author | : | Peng Li |
| Publisher | : | - 2012-01-01 |
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